发明名称 READ CIRCUIT FOR SEMICONDUCTOR MEMORY DEVICE AND SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE: A read-out circuit and a semiconductor memory device thereof are provided to reduce the scale of a circuit by deciding the number of sense amplifier according to a byte selector. CONSTITUTION: A byte selector(B0~B3) outputs a first or a eighth data signal from a plurality of memory cells based on the address, respectively. A sense amplifier simultaneously senses each first data signal from a plurality of byte selectors before the address is decided. The sense amplifier(A1~A4) senses each second or eighth data signal from the byte selector corresponding to the address which is determined. A selector circuit selects a first data signal from the byte selector corresponding to the confirmed address among each first data signal after the address decision. The selector circuit(SL1~SL5) successively selects a second or the eighth data signal.
申请公布号 KR20100053472(A) 申请公布日期 2010.05.20
申请号 KR20090108677 申请日期 2009.11.11
申请人 SEIKO INSTRUMENTS INC. 发明人 KANEKO TETSUYA
分类号 G11C7/06;G11C7/10 主分类号 G11C7/06
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