| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit having the fewest terminals for a scan test as possible, and easily configuring the scan test. Ž<P>SOLUTION: The semiconductor integrated circuit includes: an analog circuit 22 for receiving a first positive power supply voltage through a first terminal, receiving a reference voltage through a second terminal, and receiving a ground voltage through a third terminal; a logic circuit operated by a second positive power supply voltage received through a fourth terminal, selectively implementing a normal operation and a scan test operation, and implementing the scan test operation in response to predetermined scan-test-related signals related to the scan test operation; and a first signal path for supplying at least one of the predetermined scan-test-related signals to the logic circuit through at least one of the first and second terminals when the scan test operation is implemented. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
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