| 摘要 |
PURPOSE: A duty cycle correction circuit and a delay locked loop circuit including the same are provided to improve compensating capability by feedbaking an output signal with corrected duty ratio and detecting the duty ratio. CONSTITUTION: A delay locking unit(201) delays an input clock and compensates a phase skew of an external clock and an internal clock. A voltage control delay unit(209) controls the amount of delay in response to a control voltage signal, delays the internal clock, and generates a delay clock through a delay cell. The duty ratio correction unit(211) senses the edge of the internal clock and delay clock, corrects the duty ratio of the delay clock and internal clock, and outputs the corrected internal clock and delay clock. |
