发明名称 Phase-locked loop control circuitry
摘要 Control circuitry, comprising: first control means operable to generate a first control signal, the first control signal being indicative of a relationship between an output signal and a first reference signal, and to generate said output signal in dependence upon said first control signal, the first control means being configured to tend to maintain a first desired relationship between the output signal and the first reference signal in response to said first control signal; and second control means configured to influence operation of said first control means in response to said first control signal by way of a second control signal so as to tend to maintain a second desired relationship between said first control signal and a second reference signal.
申请公布号 EP2187523(A1) 申请公布日期 2010.05.19
申请号 EP20080169205 申请日期 2008.11.14
申请人 FUJITSU SEMICONDUCTOR LIMITED 发明人 MARTON, WALTER;GERMANN, BERND
分类号 H03L7/00 主分类号 H03L7/00
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