发明名称 Crosspoint switch with low reconfiguration latency
摘要 A method of operating a circuit for processing a digital signal is disclosed. The circuit includes various circuit stages having respective enabled states. A present signal path is established which includes circuit stages in their respective enabled states. Power is disabled to selected circuit stages not used in the present signal path so as to minimize power consumption in the disabled circuit stages. A data signal is then processed through the circuit stages in the present signal path. Before a next signal path is needed, power is re-enabled to selected disabled circuit stages in the next signal path to allow the enabled circuit stages to approach their respective enabled states. Then the next signal path can be established including the enabled circuit stages in their respective enabled states. The data signal can then be processed through the circuit stages in the next signal path.
申请公布号 US7719405(B2) 申请公布日期 2010.05.18
申请号 US20040011560 申请日期 2004.12.14
申请人 ANALOG DEVICES, INC. 发明人 MULCAHY DANIEL J.;TAM KIMO Y. F.
分类号 H04Q3/00 主分类号 H04Q3/00
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