发明名称 Self-biased phase locked loop
摘要 The present invention discloses a self-bias PLL including a phase frequency detector, a charge pump, a loop filter, a voltage control oscillator, a divider and a bias current converter. A charging or discharging current output from the charge pump equals to a first control current. A resistor of the loop filter is controlled by a first control voltage a second control voltage which is adjusted according to the first control voltage and a second control current. The loop filter increases or decreases the first control voltage according to the charging or discharging current output from the charge pump. The voltage control oscillator generates a bias current and an oscillation voltage according to the first control voltage and increases or decreases an oscillation frequency according to the increase or decrease of the oscillation voltage. The circuit structure of the self-bias PLL is simple and the self-bias PLL has a low jitter.
申请公布号 US7719328(B2) 申请公布日期 2010.05.18
申请号 US20080336428 申请日期 2008.12.16
申请人 SEMICONDUCTOR MANUFACTURING INTERNATIONAL (SHANGHAI) CORPORATION 发明人 FU ZHIGANG
分类号 H03L7/06 主分类号 H03L7/06
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