发明名称 |
Apparatus and method for testing and debugging an integrated circuit |
摘要 |
A system for receiving Joint Task Action Group (JTAG) data bits from a device under test includes a deserializer that receives serial messages from the device under test and forms data frames based on the serial messages. A frame sync module communicates with the deserializer and forms JTAG data bits based on the data frames. N virtual JTAG test access ports (VTAPs), each having an input and an output. The N VTAPs are connected in a daisy chain and the input of a first VTAP receives the JTAG data bits from the frame sync module.
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申请公布号 |
US7721167(B1) |
申请公布日期 |
2010.05.18 |
申请号 |
US20080154896 |
申请日期 |
2008.05.28 |
申请人 |
MARVELL INTERNATIONAL LTD. |
发明人 |
AZIMI SAEED;HO SON;SMATHERS DANIEL |
分类号 |
G01R31/28 |
主分类号 |
G01R31/28 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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