发明名称 THIN GATE STRUCTURE FOR MEMORY CELLS AND METHODS FOR FORMING THE SAME
摘要 <p>Embodiments are described for reducing the programming voltage of a memory cell in a memory device. The memory cell includes a channel region extending between first and second diffusion regions formed in a substrate. A tunnel dielectric material is formed over the channel region. A storage medium is formed over the tunnel dielectric material to store electrical charge. The storage medium is disposed between a first interface material and a second interface material, each interface material provides a smoother interface between the storage medium and surrounding dielectric materials. A charge blocking material is formed over the storage medium, followed by a control gate material.</p>
申请公布号 KR20100051121(A) 申请公布日期 2010.05.14
申请号 KR20107007413 申请日期 2008.08.25
申请人 MICRON TECHNOLOGY, INC. 发明人 BHATTACHARYYA ARUP;DERDERIAN GARO
分类号 H01L27/115;H01L21/8247 主分类号 H01L27/115
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