BIASED POWER AMPLIFIER

摘要

A power amplifier with a normally on amplifying transistor (100) is biased from a bias stage (12) and a buffer circuit (14). The bias stage (12) comprises a normally on bias transistor (120) in a reference configuration wherein a current through a main current channel of the bias transistor (120) depends on a threshold voltage value of the bias transistor (120). The combination of the bias stage (12) and the buffer circuit (14) has a voltage gain of two from a control electrode of the bias transistor (120) to the control electrode of the amplifying transistor (100) when the bias stage has one source follower transistor between the bias stage and the control electrode of the amplifying transistor, or more generally a gain of an integer factor equal to one plus a count of buffer transistors (140) coupled between the bias transistor (120) and the amplifying transistor (100) in the buffer circuit (14).