SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

摘要

<P>PROBLEM TO BE SOLVED: To improve data holding characteristics without increasing the size of a latch part of a latch type memory cell. Ž<P>SOLUTION: Conductive lines (26a and 26b) in the same wiring layer as intrinsic wiring of a flash memory cell transistor are disposed so as to extend in a direction crossing gate electrode wiring (21a and 21c) constituting a storage node of the latch type memory cell. Capacitances are formed at intersections between the gate electrode wiring and the conductive lines, and the conductive lines are maintained at a fixed potential. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž