| 摘要 |
PROBLEM TO BE SOLVED: To enlarge a scale of a circuit allowing simulation, and to reduce a time required for the simulation, in a design stage of an integrated circuit. SOLUTION: In a current decision program, a net list 12 extracted from layout data 11 of the circuit by an extraction unit 1 is divided by a division unit 2, and a plurality of list files 13, 14, 15 each including a parasitic element such as parasitic resistance are created. Current values of the circuit are measured in parallel by use of the parasitic elements belonging to the respective list files 13, 14, 15 by measurement units 3, 4, 5, and quality of a wiring pattern is decided by a decision unit 7 by use of an average current value 19 obtained by averaging the plurality of obtained measured current values 16, 17, 18 by an averaging unit 6. COPYRIGHT: (C)2010,JPO&INPIT
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