发明名称 |
SEMICONDUCTOR MEMORY DEVICE |
摘要 |
<P>PROBLEM TO BE SOLVED: To reduce a parasitic resistance of a memory cell while reducing the area thereof. Ž<P>SOLUTION: A semiconductor memory device includes: bit lines BL and /BL provided in a layer of the same level above a semiconductor substrate 30; a first variable-resistance element 10 and a first MOSFET 20 which are provided below the bit line BL and are connected in series; and a second variable-resistance element 10 and a second MOSFET 20 which are provided below the bit line /BL and are connected in series. The semiconductor memory device also includes a first interconnection layer 35 for electrically connecting one end of the first variable-resistance element 10 and one end of the second MOSFET 20 to the bit line BL and a second interconnection layer 35 for electrically connecting one end of the second variable-resistance element 10 and one end of the first MOSFET 20 to the bit line /BL. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
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申请公布号 |
JP2010103302(A) |
申请公布日期 |
2010.05.06 |
申请号 |
JP20080273275 |
申请日期 |
2008.10.23 |
申请人 |
TOSHIBA CORP |
发明人 |
ASAO YOSHIAKI;INABA TSUNEO;KAJIYAMA TAKESHI |
分类号 |
H01L27/10;H01L21/8246;H01L27/105;H01L43/08 |
主分类号 |
H01L27/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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