| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide an information processor efficiently processing a plurality of data processed in parallel and written into a system memory without increasing a CPU load. Ž<P>SOLUTION: The information processor 1 includes: a system control CPU 6 for generating a descriptor for use in information processing, and storing the generated descriptor in a system memory 2; a plurality of hardware logic processors 4 for processing unprocessed data retrieved based on the descriptor; and a reserved start-up controller 5. The reserved start-up controller 5 includes: a descriptor address storage 50 for setting therein first descriptor addresses of a plurality of descriptors 3 in association with a post-stage hardware logic processor 4b; and a hardware logic controller 51 for outputting, upon input of an end signal of a pre-stage hardware logic processor 4a, the corresponding descriptor address and a start signal to the post-stage hardware logic processor 4b. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
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