发明名称 LOW POWER ANTIFUSE SENSING SCHEME WITH IMPROVED RELIABILITY
摘要 <p>Generally, a method and circuit for improving the retention and reliability of unprogrammed anti-fuse memory cells. This is achieved by minimizing the tunneling current through the unprogrammed anti-fuse memory cells which can cause eventual gate oxide breakdown. The amount of time a read voltage is applied to the anti-fuse memory cells is reduced by pulsing a read voltage applied to a wordline connected to the unprogrammed anti-fuse memory cells, thereby reducing the tunneling current. Further tunneling current can be reduced by decoupling the unprogrammed anti-fuse memory cells from a sense amplifier that can drive the corresponding bitline to VSS.</p>
申请公布号 CA2692887(A1) 申请公布日期 2010.05.06
申请号 CA20102692887 申请日期 2010.02.26
申请人 SIDENSE CORP. 发明人 KURJANOWICZ, WLODEK
分类号 G11C17/18;G11C7/12 主分类号 G11C17/18
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