发明名称 SIMULATION METHOD FOR TRANSISTOR UNSUITABLE FOR EXISTING MODEL
摘要 A simulation method includes determining a relationship between stress time and a degradation rate of drain current on a basis of a table in which data of a lifetime of a transistor, or the degradation rate of the transistor, is written, and calculating an amount of change in drain current accordance with the degradation rate, using a table in which information indicating a change in the drain current, being dependent on voltage, is written, based on actually measured data of drain current of the transistor after degradation, drain current in an initial state of a particular transistor model, and the relationship between stress time and the degradation rate of drain current.
申请公布号 US2010114543(A1) 申请公布日期 2010.05.06
申请号 US20090608551 申请日期 2009.10.29
申请人 ELPIDA MEMORY, INC. 发明人 NAMBA YASUHIRO;LEE PETER
分类号 G06G7/48 主分类号 G06G7/48
代理机构 代理人
主权项
地址