发明名称 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE FOR POWER CONTROL
摘要 <P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device for power control of which a breakdown voltage is high but an on-resistance is low. Ž<P>SOLUTION: An n-type silicon layer 12 is formed on an n<SP>+</SP>type silicon wafer 11w, and a plurality of trenches 13 are formed in the n-type silicon layer 12. On the inner surface of the trench 13, a non-doped layer 14 containing substantially no impurities is formed. Then a p-type silicon peeler 15 is formed inside the trench 13. After that, an MOS structure is formed at the upper part of the n-type silicon layer 12. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
申请公布号 JP2010103260(A) 申请公布日期 2010.05.06
申请号 JP20080272418 申请日期 2008.10.22
申请人 TOSHIBA CORP 发明人 SATO SHINGO;OMURO YASUHISA
分类号 H01L21/336;H01L29/78 主分类号 H01L21/336
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