发明名称 |
Optimized Compressive SiGe Channel PMOS Transistor with Engineered Ge Profile and Optimized Silicon Cap Layer |
摘要 |
A semiconductor process and apparatus includes forming PMOS transistors (72) with enhanced hole mobility in the channel region by epitaxially growing a bi-axially stressed forward graded silicon germanium channel region layer (22) and a counter-doped silicon cap layer (23) prior to forming a PMOS gate structure (34) and associated source/drain regions (38, 40) in the channel region layer(s).
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申请公布号 |
US2010109044(A1) |
申请公布日期 |
2010.05.06 |
申请号 |
US20080261589 |
申请日期 |
2008.10.30 |
申请人 |
TEKLEAB DANIEL G;SAMAVEDAM SRIKANTH B |
发明人 |
TEKLEAB DANIEL G.;SAMAVEDAM SRIKANTH B. |
分类号 |
H01L29/778;H01L21/336;H01L21/8238 |
主分类号 |
H01L29/778 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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