| 摘要 |
In a communication device that is operative to perform decoding, a log-likelihood ratio (LLR) circuitry operates to calculate LLRs corresponding to every bit location within a received bit sequence. This received bit sequence may include a header and a data portion (both of which may be included within a frame that also includes a preamble). The header is composed of information bits, a duplicate of those information bits (such as may be generated in accordance with repetition encoding), and redundancy bits. The header includes information corresponding to frame or data including frame length, a code type by which the data are encoded, a code rate by which the data are encoded, and a modulation by which symbols of the data are modulated. Once the header has been decoded, then the data corresponding thereto is decoded by a block decoder circuitry to make estimates of that data.
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