发明名称 Area effective cache with pseudo associative memory
摘要 A memory system is provided comprising a memory controller, a level 1 (L1) cache including L1 tag memory and L1 data memory, a level 2 (L2) cache coupled to the L1 cache, the L2 cache including L2 tag memory having a plurality of L2 tag entries and a L2 data memory having a plurality of L2 data entries. The L2 tag entries are more than the L2 data entries. In response to receiving a tag and an associated data, if L2 tag entries having corresponding L2 data entries are unavailable and if a first tag in a first L2 tag entry with an associated first data in a first L2 data entry has a more recent or duplicate value of the first data in the L1 data memory, the memory controller moves the first tag to a second L2 tag entry that does not have a corresponding L2 data entry, vacates the first L2 tag entry and the first L2 data entry and stores the received tag in the first L2 tag entry and the received data in the first L2 data entry.
申请公布号 US7711902(B2) 申请公布日期 2010.05.04
申请号 US20060399360 申请日期 2006.04.07
申请人 BROADCOM CORPORATION 发明人 PONG FONG
分类号 G06F12/00 主分类号 G06F12/00
代理机构 代理人
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