发明名称 DRAM architecture
摘要 In one embodiment, a dynamic random access memory (DRAM) is provided that includes: a plurality of memory cells arranged into rows and columns, wherein each memory cell comprises an access transistor coupled to a storage transistor, each access transistor being arranged in a rectangular shape having a length greater than a width, the length being aligned with a corresponding column, the access transistor coupling to a storage transistor having a width greater than the width of the rectangular shape, the access transistor having a length aligned with a corresponding row such that each memory cell is L-shaped, and wherein the L-shaped memory cells in each column are staggered with respect to neighboring columns such that the L-shaped memory cells in a given column are interlocked with the L-shaped memory cells in an adjacent column.
申请公布号 US7710755(B2) 申请公布日期 2010.05.04
申请号 US20080018996 申请日期 2008.01.24
申请人 NOVELICS, LLC 发明人 TERZIOGLU ESIN;WINOGRAD GIL I.;AFGHAHI MORTEZA CYRUS
分类号 G11C5/06 主分类号 G11C5/06
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