Arithmetic logic unit and method for processing data in a graphics pipeline

摘要

Embodiments of the present invention include an arithmetic logic unit for use in a graphics pipeline. The arithmetic logic unit comprising a plurality of scalar arithmetic logic subunits wherein each subunit performs a resultant arithmetic logic operation in the form of [a*b“op”c*d] on a set of input operands a, b, c and d. The arithmetic logic unit also for produces a result based thereon wherein“op”represents a programmable operation and wherein further the resultant arithmetic logic operation is software programmable to implement a plurality of different graphics functions.