发明名称 MEMORY SYSTEM HAVING FAST AND SLOW DATA READING MECHANISMS
摘要 <p>There is provided a memory for storing data comprising: a fast data reading mechanism operable to read a data value from said memory to generate a fast read result that is output from said memory for further processing; a slow data reading mechanism operable to read said data value from said memory to generate a slow read result available after said fast read result has been output for further processing, said slow data reading mechanism being less prone to error in reading said data value than said fast data reading mechanism; a comparator operable to compare said fast read result and said slow read result to detect if said fast read result differs from said slow read result; and error repair logic operable if said comparator detects that said fast read result differs from said slow read result to suppress said further processing using said fast read result, to output said slow read result in place of said fast read result and to restart said further processing based upon said slow read result.</p>
申请公布号 KR100955285(B1) 申请公布日期 2010.04.30
申请号 KR20057017135 申请日期 2004.03.17
申请人 发明人
分类号 G11C7/00;G06F11/14;G11C7/10 主分类号 G11C7/00
代理机构 代理人
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