| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide an exclusive-OR circuit preventing rise and fall waveforms output from a logic output terminal from shifting, which is caused by a circuit configuration connected at a preceding stage. Ž<P>SOLUTION: A first logic input terminal In-1 is connected to an input end of a clocked inverter and an input terminal of a transmission gate. A second logic input terminal In-2 is connected to a clock input end of the clocked inverter. A signal having an inverted logic level of the second logic input terminal In-2 is supplied to the control end of the transmission gate. A connection point between the output end of the clocked inverter and the output terminal of the transmission gate serves as a logic output terminal Out. Ž<P>COPYRIGHT: (C)2010,JPO&INPIT Ž
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