发明名称 GENERATION DEVICE, DETERMINATION METHOD, GENERATION METHOD, AND PROGRAM
摘要 <p>The speed of compression is increased when an undetermined bit is included in an output pattern outputted from a developer installed in a logic circuit under test in relation to the logic circuit. The output pattern (7) includes the undetermined bit.  In step SS1, a determining means determines whether the undetermined bit in the output pattern (7) is an implication bit the logic value of which is determined to be 0 or 1 to meet a constraint condition (such as compressibility) between a logic bit and a predetermined bit.  In step SS1, bits other than the implication bit are free bits.  In step SS2, the determining means classifies a set of free bits.  In step SS3, under the constraint condition (such as compressibility) in relation to an input pattern (5) the determining means specifies from the set of free bits included in the output pattern (7) a set of compatible free bits to which the logic values can be assigned independently from each other.</p>
申请公布号 WO2010047219(A1) 申请公布日期 2010.04.29
申请号 WO2009JP67325 申请日期 2009.10.05
申请人 KYUSHU INSTITUTE OF TECHNOLOGY;WEN XIAOQING;NATIONAL TAIWAN UNIVERSITY;WU MENG-FAN;HUANG JIUN-LANG;MIYASE KOHEI 发明人 WU MENG-FAN;HUANG JIUN-LANG;WEN XIAOQING;MIYASE KOHEI
分类号 G01R31/3183 主分类号 G01R31/3183
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