摘要 |
A system (10) for eliminating autocorrelation bits in random number comprising a random number generator for generating a series of random bits (15), a shift register (11) having a predetermined bit length for serially receiving the randomly varying bits (15) and produce a parallel output, a counter (13) having its maximum value determined by the shift register (11) and clocked by a clocking signal, CLK which is same with the shift register (11) to count the shifted bits, and an eliminator module (12) which is activated by the counter (13) when the shifted bits have reached the maximum value, wherein the eliminator module (12) will then identify the contiguous zero and one bits and discard the unwanted bits to produce an uncorrelated random number (16). |
申请人 |
MIMOS BERHAD;NORASHIKIN, BINTI, M., THAMRIN;GUNAWAN, WITJAKSON |
发明人 |
NORASHIKIN, BINTI, M., THAMRIN;GUNAWAN, WITJAKSON |