| 摘要 |
<p>The invention relates to a multi-transistor, e.g. two-transistor memory cell arranged on a semiconductor substrate 1 comprising an access transistor 5 and a memory transistor 6, the access transistor 5 comprising an access channel region 14, a first implant and a second implant, a first diffusion implant and a second diffusion implant, and an access gate 22, wherein the access channel region 14 is arranged intermediate the first implant and the second implant, the first implant and the second implant is arranged intermediate the first diffusion implant and the second diffusion implant, the access gate 22 is arranged above the access channel region 14, the memory transistor 6 comprises a memory channel region 23, a third implant and a fourth implant, a third diffusion implant and a fourth diffusion implant, a memory gate stack 7, and a memory gate 21, the memory channel region 23 is arranged intermediate the third implant and the fourth implant, the third implant and the fourth implant is arranged intermediate the third diffusion implant and the fourth diffusion implant, the memory gate stack 7 is arranged above the memory channel region 23, and the memory gate 21 is arranged above the memory gate stack 7. Such a multi- transistor, e.g. two-transistor memory cell according to invention provides an improved reliability.</p> |
