发明名称 Clock and Data Recovery with a Data Aligner
摘要 In one embodiment, a method includes receiving first and second input streams comprising first and second input data bits, respectively. The method includes generating first and second recovered clocks based on the first and second input streams, respectively. The method includes retiming and demultiplexing the first and second input data bits to generate n first recovered streams and n second recovered streams, respectively, each comprising first and second recovered data bits, respectively. The method further includes determining a phase difference between the first and second recovered clocks; aligning the first recovered data bits with the second recovered data bits based at least in part on a value of n and the phase difference; combining the first and second recovered data bits to generate an output stream; and retiming the first and second recovered data bits in the output stream based on either the first or second recovered clock.
申请公布号 US2010104057(A1) 申请公布日期 2010.04.29
申请号 US20090510199 申请日期 2009.07.27
申请人 FUJITSU LIMITED 发明人 NEDOVIC NIKOLA;TZARTZANIS NESTOR;WALKER WILLIAM W.;TAMURA HIROTAKA
分类号 H04L7/02 主分类号 H04L7/02
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