发明名称 Failure simulation based on system level boundary scan architecture
摘要 A method and apparatus for reducing cost for the backplane and system test and for speeding up the time to market of a new product are disclosed. A failure simulation based on system level Boundary Scan architecture allows the use of an already available test infrastructure for test and validation.
申请公布号 US7707470(B2) 申请公布日期 2010.04.27
申请号 US20060553159 申请日期 2006.10.26
申请人 ALCATEL-LUCENT USA INC. 发明人 DORIS HANS-RUDOLF;LEHNER THOMAS
分类号 G01R31/28 主分类号 G01R31/28
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