发明名称 |
Integrated testing apparatus, systems, and methods |
摘要 |
Embodiments herein may enable an algorithmic pattern generator (APG) to present iterative values of one or more operational parameters to a device under test (DUT). At each iteration, one or more test patterns may be presented to the DUT. The APG may capture test results from a set of iterations of the operational parameters. The APG may also write values associated with a next operational parameter to be iterated to a test parameter configuration space within the device tester.
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申请公布号 |
US7707473(B2) |
申请公布日期 |
2010.04.27 |
申请号 |
US20060497849 |
申请日期 |
2006.08.02 |
申请人 |
MICRON TECHNOLOGY, INC. |
发明人 |
LABERGE PAUL A.;ROONEY JEFFREY J.;SNODGRASS CHARLES K. |
分类号 |
G06F11/00;G01R31/02;G01R31/26;G11C29/00 |
主分类号 |
G06F11/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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