| 摘要 |
FRAM includes a tunable gain amp serving as a local sense amp, wherein the tunable gain amp is connected to a local bit line for reading a memory cell including a pass transistor and a ferroelectric capacitor, and gain is adjusted by setting a local amp voltage for reading the memory cell more effectively with optimized gain. And a global sense amp is connected to the local sense amp for receiving a read output. When reading data, a voltage difference in the local bit line is converted to a time difference by the sense amps for differentiating high data and low data. For example, high data is quickly transferred to an output latch circuit through the sense amps with high gain, but low data is rejected by a locking signal based on high data as a reference signal. Additionally, alternative circuits and memory cell structures for implementing the memory are described.
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