发明名称 SUBSTRATE ZUR VERHINDERUNG VON WELLUNGEN UND HERSTELLUNGSVERFAHREN DAFÜR
摘要 Consistent with an example embodiment, there is an apparatus comprising a circuit (500) board. The circuit board includes a first surface (501a) and a second surface (501b). The first and second surfaces each have at least a component populated thereon; the circuit board has a first surface thereof populated before a second surface thereof and is overmolded. The circuit board has conductive material disposed over areas of the second surface defining at least a feature (504) on the second surface. The at least a feature is defined by the conductive material and other than defined by solder resist (508) disposed on the second surface overlapping the conductive material, wherein the at least a feature is a feature for remaining exposed during a process of populating the first surface other than a fiducial.
申请公布号 DE602006012833(D1) 申请公布日期 2010.04.22
申请号 DE20066012833T 申请日期 2006.06.23
申请人 TAIWAN SEMICONDUCTOR MFG. CO. LTD. 发明人 VAN DEN BOOMEN, R.W.J.
分类号 H05K1/02;H05K3/28 主分类号 H05K1/02
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