发明名称 |
HARDENING OF SELF-TIMED CIRCUITS AGAINST GLITCHES |
摘要 |
Multiple techniques are disclosed for hardening a self-clocking circuit against glitches. Glitch filters are placed in some portions of a digital design. In some embodiments the glitch filter is dynamically tunable. In one embodiment the inputs are locked out by the outputs. Methods for evaluating code symbols are presented, as is a circuit for differential signaling.
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申请公布号 |
US2010097131(A1) |
申请公布日期 |
2010.04.22 |
申请号 |
US20070849312 |
申请日期 |
2007.09.03 |
申请人 |
BAINBRIDGE JOHN;SALISBURY SEAN |
发明人 |
BAINBRIDGE JOHN;SALISBURY SEAN |
分类号 |
H04B1/10 |
主分类号 |
H04B1/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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