STACK PACKAGE AND METHOD OF MANUFACTURING THE SAME

摘要

PURPOSE: A stack package and a method for manufacturing the same are provided to reduce loaded capacitance by expanding a connecting wiring from the opening of a substrate to an external connection pad. CONSTITUTION: A substrate(110) includes a first side and a second side which opposes to the first side. A through electrode is formed in the center region of a first semiconductor chip(200). The opening of the substrate(120) exposes the through electrode. The through electrode electrically connects a second semiconductor chip(300) to the first semiconductor chip. The opening electrically connects a bonding pad(152) to the through electrode. A circuit pattern(150) includes a connection wiring which is expanded from the opening to an external connection pad.