发明名称 METHOD FOR MAKING VIA INTERCONNECTION
摘要 <p>The present invention provides a method of forming a via hole (9), or a via (7), from a lower side (5) of a substrate (3) for electronic devices towards an upper side (4) of a substrate (3) at least partly through the substrate (3). The method comprises the steps of: etching a first lengthwise portion ( 1 1) of the via hole (9) and etching a second lengthwise portion ( 12) of the via hole (9); whereby the first lengthwise portion ( 1 1) and the second lengthwise portion (12) substantially form the via hole (9) and a constriction (23) is formed in the via hole (9). The constriction (23) defines an aperture (24) of the via hole (9) and the method further comprises the step of opening the via hole (9) by etching, with the constriction (23) functioning as an etch mask. A via is formed by at least partly filling the via hole with conductive material. A substrate for electronic devices comprising a via is also provided.</p>
申请公布号 WO2010044741(A1) 申请公布日期 2010.04.22
申请号 WO2009SE51175 申请日期 2009.10.15
申请人 AAAC MICROTEC AB;NILSSON, PETER;LEIB, JUERGEN;THORSLUND, ROBERT 发明人 NILSSON, PETER;LEIB, JUERGEN;THORSLUND, ROBERT
分类号 H01L23/48;B81B7/00;H01L21/768;H01L25/065 主分类号 H01L23/48
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