STRESS TRANSFER BY SEQUENTIALLY PROVIDING A HIGHLY STRESSED ETCH STOP MATERIAL AND AN INTERLAYER DIELECTRIC IN A CONTACT LAYER STACK OF A SEMICONDUCTOR DEVICE

摘要

By forming two or more individual dielectric layers (230, 33OA, 233, 333, 234, 334) of high intrinsic stress levels with intermediate interlayer dielectric material (250A, 350A, 250B, 350B), the limitations of respective deposition techniques, such as plasma enhanced chemical vapor deposition, may be respected while nevertheless providing an increased amount of stressed material above a transistor element (220, 320A), even for highly scaled semiconductor devices (200, 300).