发明名称 GATE BIAS CIRCUIT
摘要 Multiple unit transistors each having the same gate length are arranged in a gate-lengthwise direction to form a group of unit transistors. At least one unit transistor included in the group of unit transistors is used as a part of a gate bias circuit and acts as unit transistor (102) that is used for the bias circuit, and all of or part of the other unit transistors are connected in parallel and used as amplifier (101).
申请公布号 US2010097147(A1) 申请公布日期 2010.04.22
申请号 US20070374715 申请日期 2007.05.31
申请人 NEC CORPORATION 发明人 HIRAYAMA TOMOHISA
分类号 H03F3/04 主分类号 H03F3/04
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