发明名称 Method and device for reduced read latency of non-volatile memory
摘要 Systems, apparatuses and methods for controlling access operations in a memory device that may include a memory controller(s) and memory. Commands, registers and/or other mechanisms may be defined to be supported by the memory device, where such commands, registers, and/or other mechanisms facilitate the control of read and write/erase operations to allow these operations to be performed simultaneously. Thus, a write and/or erase operation may be initiated on a first memory, a read operation initiated by a set of commands on a second memory, wherein the read and write/erase operations are performed substantially at the same time.
申请公布号 EP2178090(A1) 申请公布日期 2010.04.21
申请号 EP20100152238 申请日期 2007.01.30
申请人 NOKIA CORPORATION 发明人 GYL, YEVGEN;HAEKKINEN, JUSSI;MYLLY, KIMMO
分类号 G11C7/22;G11C7/10;G11C16/10;G11C16/26 主分类号 G11C7/22
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