发明名称 Apparatus and method for tracing processor state from multiple clock domains
摘要 A method of tracing processor data includes receiving a first trace stream from a first processor operating in response to a first clock and a second trace stream from a second processor operating in response to a second clock. The first trace stream is routed to a first dual-port synchronous memory in accordance with the first clock and the second trace stream is routed to a second dual-port synchronous memory in accordance with the second clock. The first trace stream and the second trace stream are delivered to a memory in accordance with a third clock.
申请公布号 US7702055(B2) 申请公布日期 2010.04.20
申请号 US20060537584 申请日期 2006.09.29
申请人 MIPS TECHNOLOGIES, INC. 发明人 EDGAR ERNEST L.
分类号 H04L7/00 主分类号 H04L7/00
代理机构 代理人
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