| 摘要 |
A circuit design program product to cause a computer to execute a circuit design process based on a test point insertion, includes: a step for making reference to a netlist to extract a plurality of equivalent faults fj; a step for searching a number n(fj) of test point required for a number of the equivalent fault keeping equivalent relation with a search object equivalent fault fj with each of a plurality of equivalent faults as the search object equivalent fault to become a predetermined number and a insertion position G(fj); a step for calculating probability p(fj) of a single stuck-at fault being included in a set of equivalent faults including at least a search object equivalent fault fj at an occasion when the relevant stuck-at fault takes place in the circuit; a step for calculating a parameter e(fj) derived by an equation: e(fj)=p(fj)/n(fj) on each pattern of an insertion position G(fj); and a step for determining the insertion position G(fmax) giving the maximum value among the calculated parameters e(fj) as a position where the test point is inserted.
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