发明名称 A PROGRAM VERIFY METHOD FOR OTP MEMORIES
摘要 A method for executing a program verify operation in a non-volatile memory. A data register having master and slave latching circuits is used for concurrently storing two different words of data. In a program operation, the master latch stores program data which is used for programming selected memory cells. In a program verify operation, the data programmed to the memory cells are read out and stored in the slave latches. In each data register stage, the logic states of both latches are compared to each other, and a status signal corresponding to a program pass condition is generated if opposite logic states are stored in both latches. The master latch in each stage is inverted if programming was successful, in order to prevent re-programming of that bit of data.
申请公布号 CA2649002(C) 申请公布日期 2010.04.20
申请号 CA20072649002 申请日期 2007.12.20
申请人 SIDENSE CORP. 发明人 KURJANOWICZ, WLODEK
分类号 G11C29/52;G06F11/00;G11C7/12;G11C17/14 主分类号 G11C29/52
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