发明名称 MULTIPLE FLASH MEMORY MANAGEMENT METHOD AND APPARATUS FOR MERGE OPERATION REDUCTION IN A FAST ALGORITHM BASE FTL
摘要 PURPOSE: A flash memory management method for reducing merge operations in a flash translation layer using full associative sector translation technique and a device thereof are provided to delay merge operation of frequent rewriting. CONSTITUTION: A multi flash memory(130) includes multiple flash memories(132,134,136) divided into a data block area, a log block area, and a free block area. If available free space is not in the log block area and log block optimization is required, a flash translation layer(100) calculates log block invalidation operation time and merge operation time. If the log block invalidation operation time is smaller than the merge operation time, the flash translation layer performs log block invalidation.
申请公布号 KR20100040560(A) 申请公布日期 2010.04.20
申请号 KR20080099740 申请日期 2008.10.10
申请人 IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY) 发明人 KIM, JU YOUNG;SONG, YONG HO
分类号 G06F9/06;G06F12/06 主分类号 G06F9/06
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