发明名称 Cleaning processes in the formation of integrated circuit interconnect structures
摘要 A method for fabricating an integrated circuit includes providing a substrate, forming a low-k dielectric layer over the substrate, etching the low-k dielectric layer to form an opening in the low-k dielectric layer wherein an underlying metal is exposed through the opening, performing a remote plasma treatment to the substrate wherein a plasma used for the remote plasma treatment is generated from a plasma generator separated from a chamber in which the substrate is located, forming a diffusion barrier layer in the opening, and filling the opening with a conductive material. The method preferably includes an in-situ plasma treatment in a same chamber as the step of etching the low-k dielectric layer.
申请公布号 US7700479(B2) 申请公布日期 2010.04.20
申请号 US20060593286 申请日期 2006.11.06
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 HUANG CHENG-LIN;HSIEH CHING-HUA;SHUE SHAU-LIN
分类号 H01L21/4763 主分类号 H01L21/4763
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