| 摘要 |
The present invention relates to a stress buffering package (49) for a semiconductor component, with a semiconductor substrate (52); an I/O pad (54), electrically connected to the semiconductor substrate (52); a stress buffering element (74) for absorbing stresses, electrically connected to the I/O pad (54); an underbump metallization (70), electrically connected to the stress buffering element (74); a solder ball (60), electrically connected to the underbump metallization (70); a metal element (61) between the solder ball (60) and the semiconductor substrate (52); a passivation layer (56, 58), which protects the semiconductor substrate (52) and the metal element (61) and which at least partially exposes the I/O pad (54); characterized in that a roughness of an interface between the stress buffering element (74) and the passivation layer (56, 58) is lower than a roughness of an interface between the metal element (61) and the passivation layer (56, 58). Furthermore the invention relates a method for manufacturing a stress buffering package (49) for a semiconductor component. |
