发明名称 SECURE LOGICAL VECTOR CLOCKS
摘要 Embodiments include a system for processing logical clock values according to a secure maximum operation. The system may include a communication unit and a processing unit. The communication unit may be configured to receive an encrypted first value of a logical clock, send an encrypted blinded difference, receive an encrypted blinded maximum value, and receive a maximum value. The processing unit may be configured to access an encrypted second value of the logical clock, generate the encrypted blinded difference between the first value and the second value, provide an encrypted blinded first value and an encrypted blinded second value in an oblivious transfer protocol, and generate an encrypted maximum value from the encrypted blinded maximum value.
申请公布号 US2010091984(A1) 申请公布日期 2010.04.15
申请号 US20090570787 申请日期 2009.09.30
申请人 SAP AG 发明人 KERSCHBAUM FLORIAN;VAYSSIERE JULIEN JEAN-PIERRE
分类号 H04L9/30;G06F21/72;H04L9/08 主分类号 H04L9/30
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