发明名称 Timing analysis apparatus and timing analysis method
摘要 A apparatus includes: an acquisition section that acquires information on a plurality of paths which let signals propagate in the integrated circuit in descending order of propagation time; a path capability distribution calculation section that calculates, based on the acquired information on the plurality of paths, path capability distribution; an integrated circuit capability distribution calculation section that performs a statistical operation based on the path capability distribution and on first integrated circuit capability distribution, and determines the result of the statistical operation as second integrated circuit capability distribution; and an evaluation section that calculates a parameter representing a difference between the first integrated circuit capability distribution and the second integrated circuit capability distribution, and repeats the process of the acquisition section, the process of the path capability distribution calculation section, and the process of the integrated circuit capability distribution calculation section until the parameter satisfies a predetermined condition.
申请公布号 US2010095261(A1) 申请公布日期 2010.04.15
申请号 US20090654038 申请日期 2009.12.08
申请人 FUJITSU LIMITED 发明人 ITO NORIYUKI
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
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