METHOD OF PLATING THROUGH WAFER VIAS IN A WAFER FOR 3D PACKAGING
摘要
<p>Therefore, a method of plating wafer via holes in a wafer is provided. A substrate (200) having a first and second side and a plurality of wafer via holes (210) is provided. Each via hole comprises a first and second end extending between the first and second side. A first seed layer (220) is deposited on the first side of the 5 wafer (200). A foil (250) is applied on the first seed layer (220) of the wafer closing the first ends of the plurality of wafer via holes (210). The second side of the wafer (200) is electro-chemically plated and the foil (250) is removed.</p>
申请公布号
WO2010041165(A1)
申请公布日期
2010.04.15
申请号
WO2009IB54233
申请日期
2009.09.28
申请人
NXP B.V.;BESLING, WILLEM FREDERIK ADRIANUS;ROOZEBOOM, FREDDY;LAMY, YANN PIERRE ROGER
发明人
BESLING, WILLEM FREDERIK ADRIANUS;ROOZEBOOM, FREDDY;LAMY, YANN PIERRE ROGER