发明名称 |
Apparatus and methods for controlling output of clock signal and systems including the same |
摘要 |
An apparatus for controlling data exchange with a memory device includes an interface configured to receive an arbitration signal indicating when the apparatus has use of a shared bus and an interface to the memory device configured to provide a clock signal to the memory device that synchronizes data exchange between the apparatus and the memory device. A selection circuit selectively supplies the clock signal to the memory device responsive to the arbitration signal.
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申请公布号 |
US7698524(B2) |
申请公布日期 |
2010.04.13 |
申请号 |
US20060418559 |
申请日期 |
2006.05.05 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
LEE CHANG-DUCK;BAHNG SAM-YONG;YANG SIN-HO;MUN KUI-YON |
分类号 |
G06F13/00;G06F12/00 |
主分类号 |
G06F13/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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