| 摘要 |
FIELD: physics. ^ SUBSTANCE: pulse delay device has a clock pulse generator, a counter timer, a generator of a single pulse on the leading edge and a generator of a pulse on the trailing edge, three OR logical elements, four AND logical elements, a control bus, two adders, two random access memory units, two comparators, two D flip flops, two frequency dividers with variable division factor, two registers, a pulse amplitude control device and an analogue adder. ^ EFFECT: broader functionalities of the device owing to simulation of pulses drift noise and smoothness of variation of delay values of pulses of the target and drift noise. ^ 1 dwg |
