发明名称 Semiconductor device having delay control circuit
摘要 A first delay circuit and a second delay circuit having different operation conditions from each other, a detection circuit that detects a difference in propagation speed of a pulse signal, which is simultaneously input to the first and second delay circuits, and a setting circuit that generates a selection signal based on a detection result from the detection circuit are provided. The selection signal is supplied to a delay control circuit that generates an operation timing signal by delaying a reference signal, of which a delay amount is controlled by the selection signal. With this arrangement, a necessity to set the delay amount of the delay control circuit with a large design margin can be eliminated considering PVT variation, and as a result, performance degradation can be prevented.
申请公布号 US2010085824(A1) 申请公布日期 2010.04.08
申请号 US20090588200 申请日期 2009.10.07
申请人 ELPIDA MEMORY,INC. 发明人 NAGATA KYOICHI
分类号 G11C7/00;H03L7/06 主分类号 G11C7/00
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