发明名称 HYBRID SHALLOW TRENCH ISOLATION FOR HIGH-K METAL GATE DEVICE IMPROVEMENT
摘要 A method for fabricating a semiconductor device with improved performance is disclosed. The method comprises providing a substrate including a first region and a second region; forming at least one isolation region having a first aspect ratio in the first region and at least one isolation region having a second aspect ratio in the second region; performing a high aspect ratio deposition process to form a first layer over the first and second regions of the substrate; removing the first layer from the second region; and performing a high density plasma deposition process to form a second layer over the first and second regions of the substrate.
申请公布号 US2010087043(A1) 申请公布日期 2010.04.08
申请号 US20080330347 申请日期 2008.12.08
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 CHENG CHUNG LONG;THEI KONG-BENG;CHUANG HARRY
分类号 H01L21/762 主分类号 H01L21/762
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